Andrew Douglas Hilton
Assistant Professor of the Practice in the Department of Electrical and Computer Engineering
Appointments and Affiliations
- Assistant Professor of the Practice in the Department of Electrical and Computer Engineering
- Assistant Professor of the Practice in the Department of Computer Science
- Associate Director of Graduate Studies
- Office Location: PO Box 90291, Hudson 211, Durham, NC 27708
- Office Phone: 660-5177
- Email Address: firstname.lastname@example.org
- Ph.D. University of Pennsylvania, 2010
Awards, Honors, and Distinctions:
- Publication nominated for Best Paper Award: Flexible Register Management using Reference Counting, 2012
- Graduate Fellow for Teaching Excellence, 2008-2009
- COMPSCI 391: Independent Study
- COMPSCI 553: Compiler Construction
- ECE 458: Engineering Software for Maintainability
- ECE 493: Undergraduate Research in Electrical and Computer Engineering
- ECE 496: Special Topics in Electrical and Computer Engineering
- ECE 550D: Fundamentals of Computer Systems and Engineering
- ECE 551D: Programming, Data Structures, and Algorithms in C++
- ECE 553: Compiler Construction
- ECE 891: Internship
- ECE 899: Special Readings in Electrical Engineering
Representative Publications: (More Publications)
- Battle, S; Hilton, AD; Hempstead, M; Roth, A, Flexible register management using reference counting, IEEE High-Performance Computer Architecture Symposium Proceedings (2012), pp. 273-284 [10.1109/HPCA.2012.6169033] [abs].
- Hilton, A; Nagarakatte, S; Roth, A, ICFP: Tolerating all-level cache misses in in-order processors, IEEE Micro, vol 30 no. 1 (2010), pp. 12-19 [10.1109/MM.2010.20] [abs].
- Hilton, A; Roth, A, SMT-directory: Efficient load-load ordering for SMT, IEEE Computer Architecture Letters, vol 9 no. 1 (2010), pp. 25-28 [10.1109/L-CA.2010.8] [abs].
- Hilton, A; Roth, A, BOLT: Energy-efficient out-of-order latency-tolerant execution, IEEE High-Performance Computer Architecture Symposium Proceedings (2010) [abs].
- Hilton, A; Eswaran, N; Roth, A, CPROB: Checkpoint processing with opportunistic minimal recovery, Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT (2009), pp. 159-168 [10.1109/PACT.2009.42] [abs].