Alvin R. Lebeck
Professor of Computer Science
Computer architecture, nano-scale systems, memory system, energy efficient computing, and multiprocessors.
Appointments and Affiliations
- Professor of Computer Science
- Professor in the Department of Electrical and Computer Engineering
- Office Location: D308 Lev Sci Res Ctr, Durham, NC 27708
- Office Phone: (919) 660-6551
- Web Page:
- Ph.D. University of Wisconsin at Madison, 1995
- M.S. University of Wisconsin at Madison, 1991
- B.S. University of Wisconsin at Madison, 1989
Computer architecture and its intersection with systems and tools, particularly with respect to memory system design and analysis for both serial and parallel architectures. Architectures for emerging nanotechnologies. Energy efficient computing.
Nanoscale/microscale computing systems
Awards, Honors, and Distinctions:
- Best Paper Award, IEEE Symposium on Microarchitecture
- COMPSCI 393: Research Independent Study
- COMPSCI 550: Advanced Computer Architecture I
- COMPSCI 550: Introduction to Numerical Methods and Analysis
- COMPSCI 590: Advanced Topics in Computer Science
- ECE 250L: Computer Architecture
- ECE 552: Advanced Computer Architecture I
Representative Publications: (More Publications)
- Agrawal, SR; Pistol, V; Pang, J; Tran, J; Tarjan, D; Lebeck, AR, Rhythm: Harnessing data parallel hardware for server workloads, International Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS (2014), pp. 19-34 [abs].
- Pang, J; Lebeck, AR; Dwyer, C, Modeling and simulation of a nanoscale optical computing system, Journal of Parallel and Distributed Computing, vol 74 no. 6 (2014), pp. 2470-2483 [abs].
- Pang, J; Dwyer, C; Lebeck, AR, Exploiting emerging technologies for nanoscale photonic Networks-on-Chip, Sixth International Workshop on Network on Chip Architectures (NoCArc-13) (2013), pp. 53-58 [abs].
- Pang, J; Lebeck, AR; Dwyer, C, Modeling and simulation of a nanoscale optical computing system, Journal of Parallel and Distributed Computing (2013) [10.1016/j.jpdc.2013.07.006] [abs].
- Romanescu, B; Lebeck, A; Sorin, DJ, Address translation aware memory consistency, IEEE Micro, vol 31 no. 1 (2011), pp. 109-118 [10.1109/MM.2010.99] [abs].