Albert Meixner and Daniel J. Sorin. "IOTA: Detecting Erroneous I/O Behavior via I/O Transaction Auditing." To appear in First Workshop on Compiler and Architectural Techniques for Application Reliability and Security (CATARS), June 2008.
Fred A. Bower, Daniel J. Sorin, and Landon P. Cox. "The Impact of Dynamically Heterogeneous Multicore Processors on Thread Scheduling." To appear in IEEE Micro, May/June 2008.
Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, and Sule Ozev. "Reducing the Impact of Intra-Core Process Variability with Criticality-Based Resource Allocation and Prefetching." To appear in ACM International Conference on Computing Frontiers, May 2008.
Albert Meixner and Daniel J. Sorin. "Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures." To appear in IEEE Transactions on Dependable and Secure Computing (TDSC), 2008.
Albert Meixner, Michael E. Bauer, and Daniel J. Sorin. "Argus: Low-Cost, Comprehensive Error Detection in Simple Cores." IEEE Micro: Micro's Top Picks from Computer Architecture Conferences, January/February 2008.
Bogdan F. Romanescu, Michael E. Bauer, Sule Ozev, and Daniel J. Sorin. "VariaSim: Simulating Circuits and Systems in the Presence of Process Variability." Computer Architecture News, volume 35, number 5, December 2007.
Mahmut Yilmaz, Sule Ozev, and Daniel J. Sorin. "Low-Cost Run-time Diagnosis of Hard Delay Faults in the Functional Units of a Microprocessor." IEEE International Conference on Computer Design (ICCD), October 2007.
Mahmut Yilmaz, Albert Meixner, Sule Ozev, and Daniel J. Sorin. "Lazy Error Detection for Microprocessor Functional Units." IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (DFTS), September 2007.
Anita Lungu and Daniel J. Sorin. "Verification-Aware Microprocessor Design." Sixteenth International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2007.
Albert Meixner and Daniel J. Sorin. "Error Detection Using Dynamic Dataflow Verification." Sixteenth International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2007.
Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, and Sule Ozev. "Reducing the Impact of Process Variability with Prefetching and Criticality-Based Resource Allocation." Poster and extended abstract in Sixteenth International Conference on Parallel Architectures and Compilation Techniques (PACT), September 2007.
Fred A. Bower, Daniel J. Sorin, and Sule Ozev. "Online Diagnosis of Hard Faults in Microprocessors." ACM Transactions on Architecture and Code Optimization (TACO), volume 4, number 2, June 2007.
Bogdan F. Romanescu, Michael E. Bauer, Daniel J. Sorin, and Sule Ozev. "A Case for Computer Architecture Performance Metrics that Reflect Process Variability." Duke University, Dept of Electrical and Computer Engineering, Technical Report #2007-2, May 2007.
Albert Meixner and Daniel J. Sorin. "Unified Microprocessor Core Storage." ACM Conference on Computing Frontiers, May 2007.
Albert Meixner and Daniel J. Sorin. "Error Detection via Online Checking of Cache Coherence with Token Coherence Signatures." 13th International Symposium on High-Performance Computer Architecture (HPCA), February 2007.
Mahmut Yilmaz, Derek R. Hower, Sule Ozev, and Daniel J. Sorin. "Self-Detecting and Self-Diagnosing 32-bit Microprocessor Multiplier." International Test Conference (ITC), October 2006.
Nathan N. Sadler and Daniel J. Sorin. "Choosing an Error Protection Scheme for a Microprocessor's L1 Data Cache." International Conference on Computer Design (ICCD), October 2006.
Albert Meixner and Daniel J. Sorin. "Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures." International Conference on Dependable Systems and Networks (DSN), June 2006.
Albert Meixner and Daniel J. Sorin. "Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures." Duke University, Dept of Electrical and Computer Engineering, Technical Report #2006-1, April 18, 2006.
Fred A. Bower, Derek H. Hower, Mahmut Yilmaz, Daniel J. Sorin, and Sule Ozev. "Applying Architectural Vulnerability Analysis to Hard Faults in the Microprocessor." Poster and 2-page paper in ACM SIGMETRICS, June 2006.
Tong Li, Alvin R. Lebeck, and Daniel J. Sorin. "Spin Detection Hardware for Improved Management of Multithreaded Systems." IEEE Transactions on Parallel and Distributed Systems (TPDS), volume 17, number 6, June 2006.
Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck, and Daniel J. Sorin. "NANA: A Nano-scale Active Network Architecture." ACM Journal on Emerging Technologies in Computing Systems (JETC), volume 2, number 1, January 2006.
Fred A. Bower, Daniel J. Sorin, and Sule Ozev. "A Mechanism for Online Diagnosis of Hard Faults in Microprocessors." 38th Annual International Symposium on Microarchitecture (MICRO), November 2005.
Milo M.K. Martin, Daniel J. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, and David A. Wood. "Multifacet's General Execution-driven Multiprocessor Simulator (GEMS) Toolset." Computer Architecture News (CAN), volume 33, number 4, November 2005.
Albert Meixner and Daniel J. Sorin. "Dynamic Verification of Sequential Consistency." 32nd Annual International Symposium on Computer Architecture (ISCA), June 2005.
Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck, Daniel J. Sorin. "Evaluating the Connectivity of Self-Assembled Networks of Nano-scale Processing Elements." IEEE International Workshop on Design and Test of Defect-Tolerant Nanoscale Architectures (NANOARCH '05), May 2005.
Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, and David A. Wood. "Bandwidth-adaptive, Hybrid, Cache-coherence Protocol." United States Patent 6,883,070, issued April 19, 2005.
Tong Li, Carla S. Ellis, Alvin R. Lebeck, and Daniel J. Sorin. "Pulse: A Dynamic Deadlock Detection Mechanism Using Speculative Execution." USENIX Annual Technical Conference, April 2005.
Jonathan R. Carter, Sule Ozev, and Daniel J. Sorin. "Circuit-Level Modeling for Concurrent Testing of Operational Defects due to Gate Oxide Breakdown." Design, Automation, and Test in Europe (DATE), March 2005.
Chris Dwyer, Alvin R. Lebeck, and Daniel J. Sorin. "Self-Assembled Architectures and the Temporal Aspects of Computing." IEEE Computer, volume 38, number 1, January 2005.
Chris Dwyer, Vijeta Johri, Jaidev P. Patwardhan, Alvin R. Lebeck, and Daniel J. Sorin. "Design Tools for Self-assembling Nanoscale Technology." Institute of Physics Nanotechnology, volume 15, number 9, September 2004.
Chris Dwyer, Moky Cheung, and Daniel J. Sorin. "Semi-empirical SPICE Models for Carbon Nanotube FET Logic." Fourth IEEE Conference on Nanotechnology (IEEE-Nano), August 2004.
Exercise Editor for: David A. Patterson and John L. Hennessy. Computer Organization and Design: The Hardware/Software Interface, third edition, Morgan-Kaufmann, August 2004.
Fred A. Bower, Paul G. Shealy, Sule Ozev, and Daniel J. Sorin. "Tolerating Hard Faults in Microprocessor Array Structures." International Conference on Dependable Systems and Networks (DSN), June 2004.
Jaidev P. Patwardhan, Chris Dwyer, Alvin R. Lebeck, and Daniel J. Sorin. "Circuit and System Architecture for DNA-Guided Self-Assembly of Nanoelectronics." Invited paper in Foundations of Nanoscience: Self-Assembled Architectures and Devices, April 2004.
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood. "Using Speculation to Simplify Multiprocessor Design." International Parallel and Distributed Processing Symposium (IPDPS), April 2004.
Jaidev P. Patwardhan, Alvin R. Lebeck, and Daniel J. Sorin. "Communication Breakdown: Analyzing CPU Usage in Commercial Web Workloads." International Symposium on Performance Analysis of Systems and Software (ISPASS), March 2004.
Milo M. K. Martin, Pacia J. Harper, Daniel J. Sorin, Mark D. Hill, and David A. Wood. "Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared Memory Multiprocessors." 30th Annual International Symposium on Computer Architecture (ISCA), June 2003.
Tong Li, Alvin R. Lebeck, and Daniel J. Sorin. "Quantifying Instruction Criticality for Shared Memory Multiprocessors." 15th Symposium on Parallelism in Algorithms and Architectures (SPAA), June 2003.
Alaa R. Alameldeen, Milo M. K. Martin, Carl J. Mauer, Kevin E. Moore, Min Xu, Mark D. Hill, David A. Wood, and Daniel J. Sorin. "Simulating a $2M Commercial Server on a $2K PC." IEEE Computer, volume 36, number 2, February 2003.
Daniel J. Sorin, Jonathan L. Lemon, Derek L. Eager, and Mary K. Vernon. "Analytic Evaluation of Shared-Memory Architectures." Transactions on Parallel and Distributed Systems (TPDS), volume 14, number 2, February 2003.
Daniel J. Sorin, Manoj Plakal, Anne E. Condon, Mark D. Hill, Milo M. K. Martin, and David A. Wood. "Specifying and Verifying a Broadcast and a Multicast Snooping Cache Coherence Protocol." Transactions on Parallel and Distributed Systems (TPDS), vol. 13, number 6, June 2002.
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, and David A. Wood. "SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery." 29th International Symposium on Computer Architecture (ISCA), May 2002.
Milo M. K. Martin, Daniel J. Sorin, Mark D. Hill, and David A. Wood. "Bandwidth Adaptive Snooping." 8th International Symposium on High Performance Computer Architecture (HPCA-8), February 2002.
Alaa R. Alameldeen, Pacia J. Harper, Milo M. K. Martin, Carl J. Mauer, Daniel J. Sorin, Min Xu, Mark D. Hill, and David A. Wood. "Evaluating Non-deterministic Multi-threaded Commercial Workloads." Fifth Workshop on Computer Architecture Evaluation using Commercial Workloads (CAECW-02), February 2002.
Derek L. Eager, Daniel J. Sorin, and Mary K. Vernon. "AMVA Techniques for High Service Time Variability." ACM SIGMETRICS '00, June 2000.
Mark D. Hill, Anne E. Condon, Manoj Plakal, and Daniel J. Sorin. "A System-Level Specification Framework for I/O Architectures." 11th Annual Symposium on Parallel Algorithms and Architectures (SPAA), June 1999.
E. Ender Bilir, Ross M. Dickson, Ying Hu, Manoj Plakal, Daniel J. Sorin, Mark D. Hill, and David A. Wood. "Multicast Snooping: A New Coherence Method Using a Multicast Address Network." 26th Annual International Symposium on Computer Architecture (ISCA), May 1999.
Anne E. Condon, Mark D. Hill, Manoj Plakal, and Daniel J. Sorin. "Using Lamport Clocks to Reason About Relaxed Memory Models." 5th International Symposium on High Performance Computer Architecture (HPCA-5), January 1999.
Daniel J. Sorin, Vijay S. Pai, Sarita V. Adve, Mary K. Vernon, and David A. Wood. "Analytic Evaluation of Shared-Memory Systems with ILP Processors." 25th Annual International Symposium on Computer Architecture (ISCA), June 1998.
Daniel J. Sorin, Mary K. Vernon, Vijay S. Pai, Sarita V. Adve, and David A. Wood. "A Customized MVA Model for ILP Multiprocessors." Univ. of Wisconsin - Madison, Dept of Computer Sciences Technical Report #1369, April 1998.
Manoj Plakal, Daniel J. Sorin, Anne E. Condon, and Mark D. Hill. "Lamport Clocks: Verifying a Directory Cache-Coherence Protocol." 10th Annual Symposium on Parallel Algorithms and Architectures (SPAA), June 1998.